A Parallel Algorithm Synthesis Procedure for High-Performance Computer Architectures

A Parallel Algorithm Synthesis Procedure for High-Performance Computer ArchitecturesVolume: Author(s): Ian N. Dunn, Gerard G. L. Meyer (auth.)Series: Series in Computer SciencePeriodical: Publisher: Springer USCity: Year: 2003Edition: 1Language: EnglishPages (biblio\tech): 108\113ISBN: 978-1-4613-4658-6, 978-1-4419-8650-4ID: 940518Time added: 2013-08-01 04:00:00Time modified: 2016-03-20 07:50:50Library: Library issue: Size: 7 MB (7388527 bytes)Extension: pdf ...